USB POWER DELIVERY MULTIPORT DESIGN IP

Distinctive Benefits

  • Early IP Developer for Rev3.0/Rev2.0
  • Self-contained Multi-port Sub-system
  • Authentication Engine
  • DP Alt-mode & Audio accessory
  • Customized license-free MCU
  • PMIC & BC interface controller
  • Built-in Flash support
  • Deep Sleep Mode

Deliverables

  • Fully Synthesizable Verilog RTL source code
  • Firmware source code
  • ASIC Synthesis constraints and scripts files
  • FPGA Synthesis constraints and scripts files
  • FPGA Development platform kit
  • Complete USB PD IP in GDSII including Analog PHY
  • UVM based Verification Environment and test sequences
  • User Manual, Programming guide and Verification documents

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